Design Verification Engineer - Bangalore | Bluetooth IP/Sub-System (8+ Years Experience)
Role Overview:
We are looking for a skilled and detail-oriented Design Verification Engineer with hands-on
experience in verifying Bluetooth IP and subsystems for wireless SoCs. The candidate will be responsible
for building robust UVM-based verification environments, owning test plan execution, and ensuring
closure for Bluetooth PHY/MAC-level features, aligned with IEEE 802.15.1 / Bluetooth BR/EDR/LE (BLE) /
BT 5.x/BT 5.4 standards.
Location: Bangalore
Experience Level: 8+ Years
Job Type: Full-Time
Domain/Industry: Semiconductor / ASIC Design Verification / Wireless IP
: VLSI / Semiconductor Services
Key Responsibilities: (Design Verification Engineer)

• Architect, develop, and maintain System Verilog UVM-based testbenches for Bluetooth
  controller IP/subsystems, including PHY/MAC/LL layers.
• Create comprehensive verification plans covering all Bluetooth protocol layers and custom
  enhancements.
• Verify hardware blocks implementing:
  • Bluetooth Link Layer (LL)
  • Baseband Controller (BBC)
  • Adaptive Frequency Hopping (AFH)
  • LE Advertising and Scanning
  • HCI (Host Controller Interface)
  • AES-CCM encryption/decryption
  • Bluetooth Low Energy PHY (1M, 2M, Coded PHY)

• Develop assertions, checkers, and scoreboards for protocol compliance and functional
• Drive debug efforts using tools like Verdi/DVE and perform root cause analysis for RTL/test
  bench issues.
• Collaborate closely with architects, RTL, firmware, and validation teams for spec alignment and issue resolution.
• Ensure functional and code coverage closure; track quality metrics via regression dashboards.
• Handle formal review and signoff of verification deliverables, test cases, and documentation.